In a conventional computing arrangement, a client and a server include respective network interface controllers (NICs) or network (NW) input/output (I/O) devices that are capable of communicating with each other using a Remote Direct Memory Access (RDMA) protocol. The server includes a host processor that executes the server's operating system and associated drivers. The server may also include a storage controller that directly manages access to data storage devices maintained at or by the server. The client's NW I/O device issues requests to the server's NW I/O device to write data to and read data from the storage devices maintained by the server. The server's operating system, associated drivers, and host processor process the requests received by the server's NW I/O device, and issues corresponding requests to the storage controller. The storage controller receives and executes these corresponding requests. After executing the corresponding requests, the storage controller issues request completion information (and associated data if data has been read from the storage) to the server's operating system and associated drivers. From this, the server's operating system, associated drivers, and host processor generate corresponding request completion information and associated data, and issue the corresponding request completion information and associated data to the server's NW I/O device. The server's NW I/O device then issues the corresponding request completion information and associated data to the client's NW I/O device.
The Non-Volatile Memory Express (NVMe) forum is currently standardizing the NVMe fabrics specification directed towards different transport methods for the NVMe protocol. The forum is aiming on providing low latency data transfer over computer networks using Remote DMA with NVMe. With the increase in need for faster data storage over computer networks, the usage of low latency NVMe based solid-state drives (SSD) using RDMA is highly anticipated.
According to the current art, memory is managed separately when commands and data are copied from RNIC memory to the NVMe memory and vice versa. Each of the memory modules register their own interrupts and there is a redundant usage of host resources. The problems faced by the current method include incompatible interfaces, increased redundancy, the requirement of conversion modules increases cost, inefficient memory usage, and the requirement of multiple interrupt handlers.
In view of the foregoing, there is a need for a method, system, and/or apparatuses for handling data over a network for seamless data transfer between the initiator device and the controller/device.
The above mentioned shortcomings, disadvantages and problems are addressed herein and which will be understood by reading and studying the following specification and the various example embodiments described herein.